AXBS_P_M0_HIGH_PRIORITY=AXBS_P_M0_HIGH_PRIORITY_0, L2_MEM_EN_POWERSAVING=L2_MEM_EN_POWERSAVING_0, AXBS_P_FORCE_ROUND_ROBIN=AXBS_P_FORCE_ROUND_ROBIN_0, L2_MEM_DEEPSLEEP=L2_MEM_DEEPSLEEP_0, MQS_CLK_DIV=MQS_CLK_DIV_0, RAM_AUTO_CLK_GATING_EN=RAM_AUTO_CLK_GATING_EN_0, MQS_OVERSAMPLE=MQS_OVERSAMPLE_0, MQS_EN=MQS_EN_0, MQS_SW_RST=MQS_SW_RST_0, AXBS_P_M1_HIGH_PRIORITY=AXBS_P_M1_HIGH_PRIORITY_0
GPR2 General Purpose Register
| AXBS_P_M0_HIGH_PRIORITY | AXBS_P M0 master has higher priority.Do not set both M1 and M0 to high priority. 0 (AXBS_P_M0_HIGH_PRIORITY_0): AXBS_P M0 master doesn’t have high priority 1 (AXBS_P_M0_HIGH_PRIORITY_1): AXBS_P M0 master has high priority |
| AXBS_P_M1_HIGH_PRIORITY | AXBS_P M1 master has higher priority.Do not set both M1 and M0 to high priority. 0 (AXBS_P_M1_HIGH_PRIORITY_0): AXBS_P M1 master does not have high priority 1 (AXBS_P_M1_HIGH_PRIORITY_1): AXBS_P M1 master has high priority |
| AXBS_P_FORCE_ROUND_ROBIN | Force Round Robin in AXBS_P. This bit can override master M0 M1 high priority configuration. 0 (AXBS_P_FORCE_ROUND_ROBIN_0): AXBS_P masters are not arbitored in round robin, depending on M0/M1 master priority settings. 1 (AXBS_P_FORCE_ROUND_ROBIN_1): AXBS_P masters are arbitored in round robin |
| L2_MEM_EN_POWERSAVING | Enable power saving features on L2 memory 0 (L2_MEM_EN_POWERSAVING_0): Enters power saving mode only when chip is in SUSPEND mode 1 (L2_MEM_EN_POWERSAVING_1): Controlled by L2_MEM_DEEPSLEEP bitfield |
| RAM_AUTO_CLK_GATING_EN | Automatically gate off RAM clock when RAM is not accessed. 0 (RAM_AUTO_CLK_GATING_EN_0): disable automatically gate off RAM clock 1 (RAM_AUTO_CLK_GATING_EN_1): enable automatically gate off RAM clock |
| L2_MEM_DEEPSLEEP | This bit controls how memory (OCRAM) enters Deep Sleep mode (shutdown periphery power, but maintain memory contents, outputs of memory are pulled low 0 (L2_MEM_DEEPSLEEP_0): No force sleep control supported, memory deep sleep mode only entered when whole system in stop mode (OCRAM in normal mode) 1 (L2_MEM_DEEPSLEEP_1): Force memory into deep sleep mode (OCRAM in power saving mode) |
| MQS_CLK_DIV | Divider ratio control for mclk from hmclk 0 (MQS_CLK_DIV_0): mclk frequency = hmclk frequency 1 (MQS_CLK_DIV_1): mclk frequency = 1/2 * hmclk frequency 2 (MQS_CLK_DIV_2): mclk frequency = 1/3 * hmclk frequency 255 (MQS_CLK_DIV_255): mclk frequency = 1/256 * hmclk frequency |
| MQS_SW_RST | MQS software reset 0 (MQS_SW_RST_0): Exit software reset for MQS 1 (MQS_SW_RST_1): Enable software reset for MQS |
| MQS_EN | MQS enable. 0 (MQS_EN_0): Disable MQS 1 (MQS_EN_1): Enable MQS |
| MQS_OVERSAMPLE | Medium Quality Sound (MQS) Oversample 0 (MQS_OVERSAMPLE_0): 32 1 (MQS_OVERSAMPLE_1): 64 |